1. Field of the Invention
The present invention relates to integrated circuit packaging, and more particularly to packaging of flip chip semiconductors.
2. Background Information
The drive to higher semiconductor device densities places increased demands on the packaging for these devices to remove heat generated from dissipated power in the device. One low cost packaging technique that has been used device having lower densities is plastic ball gate array (PBGA). In a PBGA thermal vias on the underside of the encapsulated die provide a thermal path for the thermal energy to the circuit board. Typically, a PBGA is limited to dissipating less than approximately 2.5 watts. The low power dissipation capability of a PBGA is quickly being exceeded by the power requirements of today's high density devices. In addition, routing the thermal energy into the circuit board limits the number of semiconductor devices that can be mounted on the circuit board.
Flip chip ball gate array (FCBGA) is a packaging technique that is capable of supporting semiconductor devices that dissipate more than 20 watts of power. In a FCBGA, the semiconductor device or integrated circuit chip is connected to a package substrate via solder balls. The package substrate is coupled to the circuit board through solder balls on the underside of the package. To connect the pads of the device or chip to the solder balls, the package substrate typically uses a build-up construction to permit the use of extremely fine pitch wiring for the interconnection. Although a FCBGA provides a packaging solution for high dissipation devices, the cost of a FCBGA is very high due to the need for a substrate having a build-up construction.